Kapanadze riddle

January 11, 2016

To end the Kapanadze riddle, I want to point everyone in the right direction and give some hints. There is no secret construction in his coil, it can be done in many different ways. The secret is in the electrical circuit that regulates the spark frequency and phase.

Noone seems to understand the importance of Electric Circuit Controller (ECC) timing device Tesla developed. He devoted 8 patents on improving this device. It was a mechanical device and required manual tuning. Kapanadze developed its modern electronic variant. 

From 1916 Tesla interview:
“I recognized that it was of tremendous advantage to break at the peak of the wave. If I used just an ordinary break, it would make and break the current at low as well as high points of the wave.  Of this apparatus I had two forms; one in which I drove the break right from the shaft of the dynamo and the other in which I drove it with an isochronous motor.  Then, by a movement of these knobs (K K), I would make the adjustments so that the makes would occur exactly at the top of the wave.  That is a form of break which is embodied in hundreds of patents and used now extensively”

Tesla’s secondary is a resonator that accumulates the disturbed energy from the surrounding environment resulting from the correctly timed spark in the primary coil. Since the resonant frequency of the secondary fluctuates due to many factors (environment conditions, load etc.) it is important to adjust the spark frequency and phase such that it always happens at the peaks of the current wave in secondary, that results in a most efficient energy transfer. This way, each spark adds energy to the resonator, resulting in a rising waveform in secondary and if it is kept unloaded and there is no overvoltage protection at the output, it will put the coil in flames. This is the secret behind the TRUE Tesla coil, not what most Tesla makers do. You don’t get this effect with random sparks.
Kapanadze’s secret is in his electronic spark timing device. He is using Phase Locked Loop circuits (Horizontal Sync) from old analog TV sets. They are used to detect the peaks in the secondary wave and then control HV generator to alter the capacitor charge speed such that the sparks happen right at the peaks of the wave.

PS. one more hint: Watch the ending of his aquarium video, listen to the spark frequency when he turns off the load and back on again.

8 People reacted on this

  1. Hello,

    So the idea behind the Electronic ECC controller is to detect the peaks in the secondary resonant circuit and synchronize the HV generator such that the spark happens right at those peaks. Easier said than done.

    Two tasks that needs to be solved:
    1) Detecting peaks
    2) Synchronizing the spark frequency and phase with those peaks

    Several approaches to peak detector:

    1. Use high speed ADC to digitize the sine wave analog input waveform and detect the peaks by comparing the digital samples in software (e.g. on a microcontroller). ADC must be providing at least 16 or 32 samples for a single sine period in order to detect the peaks precisely. Alternatively, build everything on FPGA. Those who love microcontrollers, FPGAs and other digital stuff would prefer this approach (might turn into a somewhat complicated design though)

    2. Use PLL system to detect peaks in the sine wave. I assume one has a good understanding of how PLL works and how it is used for frequency synthesis.

    Here's how PLL peak detector works. We use PLL in frequency synthesizer configuration, that is, the feedback loop contains frequency divider. Output frequency is integer multiple of sine wave frequency and is phase locked to it. So you get something like this:
    Sine peaks
    In this case, the frequency that PLL generates is 14x the sine wave frequency, giving us a train of 14 pulses for a single sine wave period. Ignoring the negative peaks, if we take every fourth pulse out of these 14, we have the precise location of the peak. Binary up (or down) counter can be used for extracting Nth pulse from the sequence.

    On PLL and 4046 IC in particular there is a good tutorial video on youtube:
    Also some info from Wikipedia on how PLLand PLL frequency synthesis works

  2. Synchronizing the spark frequency and phase with sine wave peaks

    This approach uses PLL circuits pretty much the same way they had been used in analog TVs for horizontal sync.

    Some background: In analog TVs picture is formed line by line, using horizontal and vertical deflection of the ray. To synchronize the horizontal deflection system with the transmitting station (or whatever the signal source is), incoming signal contains HSYNC pulses that indicate the start of horizontal scan lines. PLL system was added to get a perfect sync (frequency and phase locked) between the horizontal sweep generator and incoming HSYNC pulses. The system was still far from the ideal as the output from sweep generator first goes to the power amplifier stage and then deflection coil mounted on the CRT. Since amplifier stage adds some non-constant delay (there is a drift due to fluctuations in power supply voltage, thermal conditions and some other factors), actual deflection of the ray starts somewhat later than HSYNC pulses indicate. This causes a horizontal shift of the screen image, especially noticeable on large screens. To address this issue, second PLL loop was added. It picks up the feedback signal from output stage and adjusts the phase of the sweep generator such that it happens a bit earlier than HSYNC pulses indicate. This compensates for the delay in amplifier stage and gives a picture that is perfectly centered horizontally.

    In our case, we have HV generator that charges a capacitor. As soon as the breakdown voltage (set by the length of the gap) is reached, capacitor will discharge through the coil. From peak detector we already have peak pulses that indicate the desired positions where the spark gap should fire. Our task is to control HV generator to start charging the capacitor somewhat earlier than peak pulses indicate, such that the discharge happens right at those peaks. PLL is an ideal solution to solve this. We take the feedback signal from the voltage divider connected to the spark gap. Phase Detector (part of PLL) compares sinewave peak pulses with spark gap pulses and outputs an error signal which is proportional to the phase differences between the two. The error signal is then used to control the HV generator. This might sound complicated but in practice, is easier done than said.

  3. There are many designs of Solid State Tesla Coil which make use of CD4046 PLL IC for adjusting the frequency and phase of primary coil driving pulses such that secondary never goes out of resonance, e.g. due to objects moving nearby, HV streamers etc. since all of these will alter the resonant frequency.

    There are some designs the can be used as a starting point, e.g. here and here

    In order to turn these into what Tesla called Electric Circuit Controller, following modifications are needed:
    1. Primary coil driver uses low voltage. This won't work, it needs to be 1000-3000v and higher. There are HV RF transistors (MOSFETs and IGBTs) available that can do the job but they are very expensive (Used in Kapanadze's later designs). Alternatively, one can use a good old spark gap along with PLL as described in previous post. This would be a cheap solution.
    2. The design doesn't use sine wave peaks (at 90 degrees), primary pulses always happen at 0 degrees, which results in forced phase modulation and prevents rising waveform or additive process in secondary (sets the limit). Needs to be modified to use sine wave peaks as described above.
    3. It is important that primary driving pulse has a very fast rising edge. This seems to be problematic with transistors, hence the need for RF ones that are very expensive. On the other hand, spark gap is a very cheap way to get a fast rising edges, but they introduce another problem – it is very easy to trigger the spark but not that easy to quickly get rid of it – it always results in oscillations on the primary side. There is good information on that on Richie's website. One way to fight against the oscillations is to put a diode and a resistor after the gap and in series with it. Resistor will introduce a "critical resistance" in series LC circuit, that will turn periodic oscillations into aperiodic ones (single pulse with fast rising edge). Value is calculated as R = 2 x sqrt(L/C)

  4. There was a significant disclosure on Russian forums in 2009 from the person with the nick Magic. It's only verbal descriptions but enough to replicate the device. Compilation of his posts (in Russian) can be found here provided by another guy (Halerman) on his website

  5. Hello,
    Timing is so important, as the preceding discussion shows. One method I developed with some success is the use of a hall effect switch coupled to a small permanent magnet, surrounded be a core and coil. As the pulse sought increases/approaches so to does the magnetic field of the “ON” hall module. Hence, the latent condition is overcome. and the ON/OFF position changes. This is easy to accomplish with a mechanical device. With a Frequency coupled requirement it gets a bit more difficult fine tuning the relaxing coil about the biased hall module is critical. While it is questioned the need to enable or disable the with a permanently biased Hall, the answer lies in the speed of reaction to the approaching field and the sharpness of the resulting hall pulse front edge.

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